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PIC16C62B/72A

DS35008B-page 90

Preliminary

1998 Microchip Technology Inc.

13.4.3

TIMING DIAGRAMS AND SPECIFICATIONS

FIGURE 13-5: EXTERNAL CLOCK TIMING

TABLE 13-2:

EXTERNAL CLOCK TIMING REQUIREMENTS

Param

No.

Sym

Characteristic

Min

Typ

Max

Units

Conditions

Fosc

External CLKIN Frequency

(Note 1)

—

MHz

RC and XT osc modes

—

MHz

HS osc mode (-04)

—

MHz

HS osc mode (-20)

—

200

kHz

LP osc mode

Oscillator Frequency

(Note 1)

—

MHz

RC osc mode

0.1

—

MHz

XT osc mode

—

MHz

HS osc mode

—

200

kHz

LP osc mode

Tosc

External CLKIN Period

(Note 1)

250

—

RC and XT osc modes

250

—

HS osc mode (-04)

—

HS osc mode (-20)

5—

—

sLP osc mode

Oscillator Period

(Note 1)

250

—

RC osc mode

250

—

10,000

XT osc mode

250

—

250

HS osc mode (-04)

—

250

HS osc mode (-20)

5—

—

sLP osc mode

TCY

Instruction Cycle Time (Note 1)

200

—

TCY = 4/FOSC

TosL,

TosH

External Clock in (OSC1) High

or Low Time

100

—

XT oscillator

2.5

—

LP oscillator

—

HS oscillator

TosR,

TosF

External Clock in (OSC1) Rise

or Fall Time

—

XT oscillator

—

LP oscillator

—

HS oscillator

* These parameters are characterized but not tested.

Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only

and are not tested.

Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are

based on characterization data for that particular oscillator type under standard operating conditions with the

device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or

higher than expected current consumption. All devices are tested to operate at "min." values with an external

clock applied to the OSC1/CLKIN pin.

When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.

OSC1

CLKOUT

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